(Hong Kong)
Product Summary
The MC10EPT20DR2 is a LVTTL/LVCMOS to differential LVPECL translator. Because LVPECL (Positive ECL) levels are used only +3.3V and ground are required. The small outline 8–lead SOIC package and the single gate of the MC10EPT20DR2 makes it ideal for those applications where space, performance, and low power are at a premium.
Parametrics
MC10EPT20DR2 absolute maximum ratings: (1)VCC Power Supply: 6.0 to 0 VDC; (2)VI Input Voltage (VI not more positive than VCC): 6.0 to 0 VDC; (3)Iout Output Current: Continuous 50mA, Surge 100mA; (4)TA Operating Temperature Range: –40 to +85 ℃; (5)Tstg Storage Temperature: –65 to +150 ℃; (6)qJA Thermal Resistance (Junction–to–Ambient): Still Air 190℃/W, 500lfpm 130℃/W; (7)θJC Thermal Resistance (Junction–to–Case): 41 to 44 ± 5% ℃/W; (8)Tsol Solder Temperature (<2 to 3 Seconds: 245℃ desired): 265 ℃.
Features
MC10EPT20DR2 features: (1)390ps Typical Propagation Delay; (2)High Bandwidth to 1.0 GHz Typical; (3)Differential LVPECL Outputs; (4)Small Outline SOIC Package; (5)PNP LVTTL Inputs for Minimal Loading; (6)VCC Range of 3.0V to 3.6V; (7)ESD Protection: >1.5KV HBM, >200V MM; (8)Q Output will default HIGH with inputs open; (9)Moisture Sensitivity Level 1, Indefinite Time Out of Drypack. For Additional Information, See Application Note AND8003/D; (10)Flammability Rating: UL-94 code V-0 @ 1/8", Oxygen Index 28 to 34; (11)Transistor Count = 150 devices.
Diagrams
| Image | Part No | Mfg | Description |  |
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 MC10EPT20DR2 |
ON Semiconductor |
Translation - Voltage Levels 3.3V TTL/CMOS |
Data Sheet |
Negotiable |
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MC10EPT20DR2G |
ON Semiconductor |
Translation - Voltage Levels 3.3V TTL/CMOS to Diff PECL |
Data Sheet |
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