ATF1508ASV-15AU100

ATF1508ASV-15AU100, 100TQFP, complex programmable logic device, -2.0V to +14.0V, -2.0V to +7.0V

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Price:: US $0.15~2.40 / piece [Get Latest Price]

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PartNumber:: ATF1508ASV-15AU100

Brand:: ATMEL Corporation - ATMEL | Pack: TQFP | D/C: 12+

Availability:: Supply Ability: 10000/Week Can Ship Immediately
Delivery: 10-15 Business Days (ships out within 3 Business days)

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Products Upload time: 2012-10-09

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Part Number:ATF1508ASV-15AU100
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Product Summary

The ATF1508ASV-15AU100 is a high-performance, high-density complex programmable logic device (CPLD) that utilizes Atmel’s proven electrically-erasable technology. With 128 logic macro cells and up to 100 inputs, it easily integrates logic from several TTL, SSI, MSI, LSI and classic PLDs. The ATF1508ASV-15AU100’s enhanced routing switch matrices increase usable gate count and increase odds of successful pin-locked design modifications.

Parametrics

ATF1508ASV-15AU100 absolute maximum ratings: (1)Temperature Under Bias: -40℃ to +85℃; (2)Storage Temperature: -65℃ to +150℃; (3)Voltage on Any Pin with Respect to Ground: -2.0V to +7.0V; (4) Voltage on Input Pins with Respect to Ground during Programming: -2.0V to +14.0V; (5) Programming Voltage with Respect to Ground: -2.0V to +14.0V.

Features

ATF1508ASV-15AU100 features: (1)High-density, High-performance, Electrically-erasable Complex Programmable Logic Device: 3.0V to 3.6V Operating Range, 128 Macro cells, 5 Product Terms per Macro cell, Expandable up to 40 per Macro cell, 84, 100, 160 Pins, 15 ns Maximum Pin-to-pin Delay, Registered Operation up to 77 MHz, Enhanced Routing Resources; (2)Flexible Logic Macro cell: D/T/Latch Configurable Flip-flops, Global and Individual Register Control Signals, Global and Individual Output Enable, Programmable Output Slew Rate, Programmable Output Open Collector Option, Maximum Logic Utilization by Burying a Register within a COM Output; (3)Advanced Power Management Features: Automatic 5μA Standby for "L" Version, Pin-controlled 100μA Standby Mode, Programmable Pin-keeper Inputs and I/Os, Reduced-power Feature per Macro cell; (4)Available in Commercial and Industrial Temperature Ranges; (5)Available in 84-lead PLCC and 100-lead PQFP and TQFP and 160-lead PQFP Packages; (6)Advanced EE Technology: 100% Tested, Completely Reprogrammable, 10,000 Program/Erase Cycles, 20 Year Data Retention, 2000V ESD Protection, 200mA Latch-up Immunity; (7)JTAG Boundary-scan Testing to IEEE Std. 1149.1-1990 and 1149.1 -1993 Supported; (8)Fast In-System Programmability (ISP) via JTAG; (9)PCI-compliant; (10)Security Fuse Feature.